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Photonic Network On Chip Design

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Author by : Keren Bergman
Languange Used : en
Release Date : 2013-08-13
Publisher by : Springer Science & Business Media

ISBN : 9781441993359

This book provides a comprehensive synthesis of the theory and practice of photonic devices for networks-on-chip. It outlines the issues in designing photonic network-on-chip architectures for future many-core high performance chip multiprocessors. The discussion is built from the bottom up: starting with the design and implementation of key photonic devices and building blocks, reviewing networking and network-on-chip theory and existing research, and finishing with describing various architectures, their characteristics, and the impact they will have on a computing system. After acquainting the reader with all the issues in the design space, the discussion concludes with design automation techniques, supplemented by provided software....

Photonic Interconnects For Computing Systems

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Author by : Mahdi Nikdast
Languange Used : en
Release Date : 2017
Publisher by : River Publishers

ISBN : 9788793519800

Photonic Interconnects for Computing Systems provides a comprehensive overview of the current state-of-the-art technology and research achievements in employing silicon photonics for interconnection networks and high-performance computing, summarizing main opportunities and some challenges....

Architectures And Design Automation For Photonic Networks On Chip

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Author by : Gilbert R. Hendry
Languange Used : en
Release Date : 2011
Publisher by :

ISBN : OCLC:867753154

Chip-scale photonics has emerged as an exciting field which can potentially solve many of the problems plaguing the high-performance computing industry, from large-scale to embedded. In theory, photonics is a superior communication medium because of its higher bandwidth density using wave-division multiplexing and bandwidth-power translucency to distance traveled. In practice, physical-layer design and engineering issues such as optical loss, crosstalk, and packaging have slowed its entry into widespread adoption at the chip and board scale. In this work, we present these issues and potential design improvements. The major contributions, however, are the tools and methods we have developed for the design of photonic interconnection networks, including a system-level simulator and CAD and modeling environment for layout, both of which are publicly available to the research community....

Photonic Interconnects For Computing Systems

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Author by : Gabriela Nicolescu
Languange Used : en
Release Date : 2022-09-01
Publisher by : CRC Press

ISBN : 9781000793376

In recent years, there has been a considerable amount of effort, both in industry and academia, focusing on the design, implementation, performance analysis, evaluation and prediction of silicon photonic interconnects for inter- and intra-chip communication, paving the way for the design and dimensioning of the next and future generation of high-performance computing systems. Photonic Interconnects for Computing Systems provides a comprehensive overview of the current state-of-the-art technology and research achievements in employing silicon photonics for interconnection networks and high-performance computing, summarizing main opportunities and some challenges. The majority of the chapters were collected from presentations made at the International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS) held over the past two years. The workshop invites internationally recognized speakers on the range of topics relevant to silicon photonics and computing systems. Technical topics discussed in the book include:Design and Implementation of Chip-Scale Photonic Interconnects;Developing Design Automation Solutions for Chip-Scale Photonic Interconnects;Design Space Exploration in Chip-Scale Photonic Interconnects;Thermal Analysis and Modeling in Photonic Interconnects;Design for Reliability;Fabrication Non-Uniformity in Photonic Interconnects;Photonic Interconnects for Computing Systems presents a compilation of outstanding contributions from leading research groups in the field. It presents a comprehensive overview of the design, advantages, challenges, and requirements of photonic interconnects for computing systems. The selected contributions present important discussions and approaches related to the design and development of novel photonic interconnect architectures, as well as various design solutions to improve the performance of such systems while considering different challenges. The book is ideal for personnel in computer/photonic industries as well as academic staff and master/graduate students in computer science and engineering, electronic engineering, electrical engineering and photonics....

Reliability Aware Multi Segmented Bus Architecture For Photonic Networks On Chip

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Author by : Patrick Sieber
Languange Used : en
Release Date : 2013
Publisher by :

ISBN : OCLC:855384049

"Network-on-chip (NoC) has emerged as an enabling platform for connecting hundreds of cores on a single chip, allowing for a structured, scalable system when compared to traditional on-chip buses. However, the multi-hop wireline paths in traditional NoCs result in high latency and energy dissipation causing an overall degradation in performance, especially for increasing system size. To alleviate this problem a few radically different interconnect technologies are envisioned. One such method of interconnecting different cores in NoCs is photonic interconnects. Photonic NoCs are on-chip communications networks in which information is transmitted in the form of optical signals. Photonic interconnection is one of the leading examples of emerging technology for on-chip interconnects. Existing innovative photonic NoC architectures have improved performance and reduced energy dissipation. Most architectures use Wavelength Division Multiplexing (WDM) on the photonic waveguides to increase the data bandwidth. However they have issues relating to reliability, such as waveguide losses and adjacent channel crosstalk. These phenomena could have a crippling effect on a system, and most current architectures do not address these effects. A newly proposed topology, known as the Multiple-Segmented Bus topology, or MSB, has shown promise for solving, or at least reducing, many of the problems plaguing the design of photonic networks using a modification of a folded torus to transmit different wavelengths signals simultaneously. The MSB segments the waveguides into smaller parts to limit the waveguide losses. The formal performance evaluation of this proposed architecture has not been completed. this thesis will analyze the performance of such a network when implemented as a NoC in terms of data bandwidth, energy dissipation, latency, and reliability. By analyzing and comparing performance, energy dissipations, and reliability, the MSB-based photonic NoC (MSB-PNoC) can be compared to other state-of-the-art photonic NoCs to determine the feasibility of this topology for future network-on-chip designs."--Abstract....

On Chip Photonic Interconnects

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Author by : Christopher J. Nitta
Languange Used : en
Release Date : 2013-10-01
Publisher by : Morgan & Claypool Publishers

ISBN : 9781627052122

As the number of cores on a chip continues to climb, architects will need to address both bandwidth and power consumption issues related to the interconnection network. Electrical interconnects are not likely to scale well to a large number of processors for energy efficiency reasons, and the problem is compounded by the fact that there is a fixed total power budget for a die, dictated by the amount of heat that can be dissipated without special (and expensive) cooling and packaging techniques. Thus, there is a need to seek alternatives to electrical signaling for on-chip interconnection applications. Photonics, which has a fundamentally different mechanism of signal propagation, offers the potential to not only overcome the drawbacks of electrical signaling, but also enable the architect to build energy efficient, scalable systems. The purpose of this book is to introduce computer architects to the possibilities and challenges of working with photons and designing on-chip photonic interconnection networks....

Design Of On Chip Photonic Interconnection Based On Physical Layer Analysis

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Author by : Min Soo Kim
Languange Used : en
Release Date : 2011
Publisher by :

ISBN : 1124674780

As the number of cores on a chip continues to increase, the communication bottleneck between cores has become a critical issue. As traditional electrical networks on chips cannot meet the predicted bandwidth requirements without power consumption that goes beyond budget, alternative communication mediums have been proposed. As a potential solution, recent advances in silicon photonics have allowed the vision of on-chip photonic communication, and many on-chip photonic interconnection designs have been proposed in recent years. However, many of these have high complexity cost from trying to accomplish full 2D photonic routing over the chip area. The detailed physical implications of these complexities are often ignored in the research projects, and hence they fail to demonstrate realistic performance. The Photonic Networked Processor Array (P-NePA) presented in this thesis proposes an alternative approach, where a network is divided into smaller subnets. Full photonic connectivity is provided within each subnet, and the connections between subnets are accomplished through simple electrical routing and re-modulation of messages. It is demonstrated that P-NePA will likely result in small power consumption, area, and insertion loss compared to the other photonic networks, and P-NePA demonstrates good performance that does not degrade with high traffic, making it a viable solution to the problem of congestion in electrical networks....

Pulsar

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Author by : Kwadwo Opong-Mensah
Languange Used : en
Release Date : 2015
Publisher by :

ISBN : OCLC:923011893

"As the computing industry moved toward faster and more energy-efficient solutions, multicore computers proved to be dependable. Soon after, the Network-on-Chip (NoC) paradigm made headway as an effective method of connecting multiple cores on a single chip. These on-chip networks have been used to relay communication between homogeneous and heterogeneous sets of cores and core clusters. However, the variation in bandwidth requirements of heterogeneous systems is often neglected. Therefore, at a given moment, bandwidth may be in excess at one node while it is insufficient at another leading to lower performance and higher energy costs. This work proposes and examines dynamic schemes for the allocation of photonic channels in a Photonic Network-on-Chip (PNoC) as an alternative to their static-provision counterparts and proposes a method of simulating and selecting the characteristics of a dynamic system at the time of design as to achieve maximum system performance in a Photonic Network-on-Chip for a given application type."--Abstract....

Photonic Networks

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Author by : Giancarlo Prati
Languange Used : en
Release Date : 2012-12-06
Publisher by : Springer Science & Business Media

ISBN : 9781447109792

The day when fiber will deliver new, yet now only foreseeable, broadband ser vices to the end user is getting nearer and nearer as we make our way towards the prophetic year 2000. Step by step, as we move from first generation lasers and fibers to the by now common erbium-doped fiber amplifiers, looking forward to such things as wavelength multiplexing and solitons, photonic switching and optical storage, the community of researchers in optical communications has stepped into the era of photonic networks. It is not just a question of terminology. Optical communication means tech nology to the same extent that photonic network means services. If it is true that information is just as marketable a product as oil or coke, the providing of an extensive global information infrastructure may end up having an even greater impact than the setting up of a world-wide railroad network did at the beginning of the industrial era. Just like wagons, bandwidth will be responsible for carrying and delivering goods to customers. The challenge for all of us in this field is for it to function in every section of the overall network, transport, access and customer area, in the best possible way: the fastest, most economical and most flexible. New services provided by a new network that exploits the potential and peculiarities of photonics surely requires a rethinking of solutions, new ideas, new architec tures, new design, especially where electronics is still dominant, as in transport and access networks....

Low Power Design Methodology And Photonics Networks On Chip For Multiprocessor System On Chip

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Author by : Khawla Hamwi
Languange Used : en
Release Date : 2013
Publisher by :

ISBN : OCLC:874569865

Multiprocessor systems on chip (MPSoC)s are strongly emerging as main components in high performance embedded systems. Several challenges can be determined in MPSoC design like the challenge which comes from interconnect infrastructure. Network-on-Chip (NOC) with multiple constraints to be satisfied is a promising solution for these challenges. ITRS predicts that hundreds of cores will be used in future generation system on chip (SoC) and thus raises the issue of scalability, bandwidth and implementation costs for NoCs. These issues are raised within the various technological trends in semiconductors and photonics. This PhD thesis advocates the use of NoC synthesis as the most appropriate approach to exploit these technological trends catch up with the applications requirements. Starting with several design methodologies based on FPGA technology and low power estimation techniques (HLS) for several IPs, we propose an ASIC implementation based on 3D Tezzaron technology. Multi-FPGA technology is used to validate MPSoC design with up to 64 processors with Butterfly NoC. NoC synthesis is based on a clustering of masters and slaves generating asymmetric architectures with appropriate support for very high bandwidth requests through Optical NoC (ONoC) while lower bandwidth requests are processed by electronic NoC. A linear programming is proposed as a solution to the NoC synthesis....